The present invention relates to a solid-state imaging device, a method of manufacturing the same, an image capturing apparatus, a semiconductor device, and a method of manufacturing the same, and more particularly, to a solid-state imaging device in which a dielectric film inducing a predetermined charge region is formed on the surface of a semiconductor substrate, a method of manufacturing the same, an image capturing apparatus, a semiconductor device, and a method of manufacturing the same.
With high integration of a semiconductor device, a packaging density has a tendency to increase by further reducing a transistor and another semiconductor device. Therefore, in a CMOS sensor (CMOS solid-state imaging device), it is necessary for pixels to become minute for high integration of the device.
However, a CMOS sensor according to a related art has a configuration in which a light sensing portion receives and detects light from a lens formed in a wiring section via a space between wiring layers. Therefore, as the pixels become minuter with high integration of the device, the shading of the incident light occurs by obstacles such as the wiring layer, the aperture ratio of the light-receiving sensor is decreased, and thus sufficient light may not be emitted to the light sensing portion. For this reason, sensitivity may deteriorate or shading may be increased.
By illuminating the light-receiving sensor with light from the rear surface side (opposite opposite side to the wiring section), the effective aperture ratio of 100% can be achieved without the influence of the obstacles such as the wiring layers, thereby considerably increasing the sensitivity.
In order to achieve this, a CMOS sensor having a configuration in which the light-receiving sensor is illuminated with light from the rear side (opposite opposite side to the wiring section), which is called a back-illuminated CMOS sensor, was developed (for example, see Japanese Unexamined Patent Application Publication No. 2003-31785).
In the CMOS sensor, however, it is known that a crystal defect in a photodiode or an interface level between a light sensing portion formed in a silicon substrate and a layer-insulation layer on an upper layer of the light sensing portion is a cause of dark current.
As shown in FIG. 13A, the interface level indicated by sign x in the drawing occur in the interface between a silicon layer 101, in which a photodiode PD is formed, and a layer-insulation layer 102 on an upper layer of the silicon layer 101. The interface level is the cause of dark current, and thus electrons generated in the interface become dark current and flow into the photodiode PD.
In order to suppress this dark current, a so-called HAD (Hole Accumulation Diode) structure was suggested. Specifically, as shown in FIG. 13B, there was suggested the HAD structure in which a p+ semiconductor region is formed by implanting p-type impurities to the vicinity of the surface of the silicon layer 101 and the p+ semiconductor region is used as a positive charge accumulation region 103 where positive charges (holes) are accumulated.
In this way, since the photodiode PD can be separated from the interface in the HAD structure in which the positive charge accumulation region 103 is formed in the interface, dark current which is the cause of the interface level can be suppressed.
However, since a p-type impurity layer which is the positive charge accumulation region is present on the photodiode PD, it is considered that the p-type impurity layer may cause the deterioration in color mixture.
That is, even when the positive charge accumulation region (p-type impurity region) is formed, photoelectric conversion electrons occur at constant probability due to the fact that the photoelectric conversion electrons propagate to the adjacent photodiode PD (see FIG. 14).